Project Lead (FPGA Systems) Walk-ins on 21st, 22nd April 2012
Posted on April 17th, 2012Project Lead
Qualification: B.E / B.Tech , M.Tech
Exp: 8-10yrs
Job Description:
Overall 6 to 8 years, 4 to 5 years in RAIL domain Electronics, Hands -on design experience in RAIL Electronics braking systems is preferred.
• VHDL & Verilog HDL design
• Acte l, ALTERA, XILINX, FPGA based designs
• SIL-3 , 4 grade system realization
• Microprocessor based ruggedized system design & evaluation
Wok Location: Hyderabad
Company Name: Infotech Enterprises Ltd
Walk-in Date: 21st, 22nd April 2012
Walk-in Venue:
Infotech Enterprises Ltd
Plot No: 2
IT Park, Nanakramguda,
Gachibowli
HYDERABAD
Keywords: Acte l, ALTERA, FPGA, Hyderabad Career, XILINX
